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    Design Method of on chip Medium and Low Voltage Full Isolation DDSCR Based on BCD Process[J]. Commercial Vehicle, 2025, (3): 79-81. DOI: 10.20042/j.cnki.1009-4903.2025.03.021
    Citation: Design Method of on chip Medium and Low Voltage Full Isolation DDSCR Based on BCD Process[J]. Commercial Vehicle, 2025, (3): 79-81. DOI: 10.20042/j.cnki.1009-4903.2025.03.021

    Design Method of on chip Medium and Low Voltage Full Isolation DDSCR Based on BCD Process

    • As the importance of electrostatic discharge (ESD) protection capabilities gains increasing market recognition, traditional on-chip ESD devices are progressively failing to meet the growing ESD protection requirements for ports. To enhance product competitiveness, it has become imperative to improve the performance of on-chip ESD devices, particularly in automotive electronics. A series of customized requirements for on-chip ESD protection in applications such as in-vehicle bus systems, which demand substrate-direction voltage withstand capabilities, necessitates that such devices possess full isolation from the substrate. Addressing these port protection requirements, this paper proposes a universal modification approach based on standard devices in BCD (BipolarCMOS-DMOS) processes. This methodology enables designers to develop fully isolated Dual-Directional Silicon-Controlled Rectifier (DDSCR) structures that comply with port application requirements using standard device structure.
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